Design and verification engineers will be learning the importance of ensuring a stable operation and of reducing the risk of failure after any change over the product’s lifetime. Both require a solid characterization of the memory interface.
We will be discussing test and tool requirements such as bandwidth,...
Published: Sep 17, 2020
One of the primary purposes of a gate driver is to enable power switches to turn on and off faster, improving rise and fall times. Faster switching enables higher efficiency and higher power density, reducing losses in the power stage associated with high slew rates. However, as slew rates increase, so do measurement and...
Published: Sep 03, 2020
Today, R&D engineers face challenging time-to-market goals. Extending the product development schedule and delaying the product launch can prove to be extremely costly in terms of opportunity cost and lost market share. Nearly 50 % of products fail EMC compliance the first time.
Every day spent on debugging, isolating...
Published: Oct 06, 2020
Timing components such as low jitter oscillators and clocks are necessary to facilitate increasing data rates in high speed digital designs. As part of the overall system design, the components also have to perform in the system’s non-ideal power integrity environment and limit the power supply induced phase noise...
Published: Oct 20, 2020
Vector Network Analysers (VNA) are gaining popularity in the Signal Integrity community as Time Domain Measurement and Analysis tools.
VNAs with 8 ports or more can provide significant decreases in test time by migrating from a 4-port measurement system to an 8-port measurement system. For tight tolerance DUTs...
Published: Sep 01, 2020
All electronic devices contain capacitive or inductive components that can cause a disproportionately high current while switching on the device.
From an FPGA to a drilling machine, virtually every component or device requires an inrush current that by far exceeds the normal operating current. To properly design the...
Published: Sep 23, 2020
Vector Network Analyzers of Rohde&Schwarz family are able to measure magnitude and phase of complex S-parameters of a device under test (DUT) in the frequency domain. By means of the inverse Fourier transform the measurement results can be transformed to the time domain. Thus, the impulse or step response of the DUT...
Published: Sep 23, 2019
The pace of innovation has changed. Original equipment manufacturers (OEMs) can no longer take years to introduce new products or update functionality in existing products. If your customers can’t get what they want, when they want it, they’re quick to go elsewhere.
OEMs in nearly every industry are becoming...
Published: Sep 25, 2020
In a design of a modern switch-mode power supplies (SMPS), the designer has to ensure that the converter is operating in its specified values over all circumstances. For example, some of these tests to ensure proper performance are output voltage deviation test, load transient test, output voltage ripple, input voltage...
Published: Sep 03, 2020
Radar, satellite communications and 5G NR use AAS with phased array antennas for beamforming. Hybrid beamforming combines the flexibility of digital beamforming with the efficiency of analog beamforming.
Increasing integration enables compact and cost-efficient AAS. To achieve accurate, reliable and efficient beamforming,...
Published: Sep 03, 2020
Analyzing RF pulses is a key aspect of pulsed radar applications, e.g. in air traffic control (ATC), maritime radar or scientific measurements of the ionosphere. It is essential to analyze the pulse envelope in the time domain because it contains important information needed to characterize the application.
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Published: Oct 06, 2020
Deembedding, often a necessary and complex task, is made easier with an integrated hardware and software solution. Whether you are debugging a high-speed interface such as DDR or PCIe, characterising a fast clock or analysing a complex RF signal, you want to see the real signal and not artifacts of the test setup such...
Published: Sep 03, 2020
This whitepaper includes a review of differential pair properties and how they differ between tightly and loosely coupled pairs. Also a description of test set-up used to look at signal integrity through several different differential pair architectures. The results are then shown and the information is concluded. ...
Published: Jul 17, 2018
PCI was originally designed as an interconnect for personal computers; because of the nature of PCs at that time, the protocol architects did not anticipate the need for multiprocessors. Therefore, they designed the system assuming that the host processor would enumerate the entire memory space. Obviously, if another processor...
Published: Jul 17, 2018